POSE PHASE II

An Open Source Ecosystem for Collaborative Rapid Design of Edge AI Hardware Accelerators for Integrated Data Analysis and Discovery.

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Our Project Aims to Develop Activities and Initiatives to Build a Strong, Equitable, and Sustainable Ecosystem for hls4ml.

Networking & Training

Through this POSE grant we are developing a series of networking and training events for trainees in the areas of science and engineering domains and current and future users of hls4ml.

Examples & Tutorials

The amount and variety of design examples and tutorial projects will be extended significantly in order to supply the community with a solid toolbox for the longer term to become productive and efficient users and contributors of hls4ml beyond the timeline of the NSF funded period.

Technical Support

Throughout the grant's duration we will also provide technical support through a dedicated staff member for code maintenance and development needs of contributors of hls4ml.

Curricular Components

Curricular components developed by our project's team members will be shared with programs throughout our network.

Our Team

Seda Ogrenci

Lead Principal Investigator
Seda Ogrenci is a Professor in the Department of Electrical and Computer Engineering (ECE), and in the Department of Computer Science (CS). She is the Director of the Computer Engineering Division of ECE.
Seda Ogrenci is a Professor in the Department of Electrical and Computer Engineering (ECE), and in the Department of Computer Science (CS). She is the Director of the Computer Engineering Division of ECE. She has received her PhD degree in Computer Science from the University of California-Los Angeles. She is the co-author of more than 120 peer reviewed publications and twelve patents on the subjects of Electronic Design Automation, Reconfigurable Computing, Thermal-Aware High Performance Computing, Computer Architecture, and Instrumentation for High Energy Physics. She is the author of the book : Heat Management in Integrated Circuits - On-chip and system-level monitoring and cooling (Materials, Circuits and Devices). Dr Ogrenci has served as technical program chair, committee member, organizing committee member, and track chair of several conferences, including ICCAD, DAC, DATE, EUC, FPL, GLSVLSI, and ISVLSI and she has served on the Editorial Board of IEEE Transactions on VLSI. She is currently on the Editorial Board of the ACM Transactions on Reconfigurable Systems and Technology and IEEE Transactions on CAD.

Nhan Tran

Senior Personnel
I am a high energy particle physics experimentalist at Fermilab. I am interested in understanding the basic building blocks of the universe using particle accelerators to smash particles together and study these collisions in the laboratory.
I am a high energy particle physics experimentalist at Fermilab. I am interested in understanding the basic building blocks of the universe using particle accelerators to smash particles together and study these collisions in the laboratory. I am a member of the CMS experiment at the CERN LHC and was extremely fortunate to be a part of the Higgs discovery. My most recent activities involve study of the Higgs boson, searches for phenomena beyond the Standard Model of particle physics, and understanding nature of dark matter.

Mark Neubauer

Co-Principal Investigator
My current research is to search for physics beyond the standard model through a detailed study of high-energy proton-proton collisions at CERN’s Large Hadron Collider (LHC).
My current research is to search for physics beyond the standard model through a detailed study of high-energy proton-proton collisions at CERN’s Large Hadron Collider (LHC). My research group searches for new physics using data from the ATLAS Experiment, with an emphasis on the Higgs boson as a sensitive tool for discovery and applications of machine learning to enhance our sensitivity to new physics. My group is also working to improve the experimental methods and apparatus in high-energy physics, including advancing scientific software and computing and developing fast electronics for highly-parallelized systems that track charged particles at the LHC. I also work to incorporate results and methods from my research at the intersection of AI/ML, physics, data science into the graduate and undergraduate curriculum at the University of Illinois, Urbana-Champaign by developing courses such as Machine Learning for Physics, Instrumentation Physics: Applications of Machine Learning, and Data Analysis for Physics.

Amit Ranjan Trivedi

Co-Principal Investigator
Amit Ranjan Trivedi is a senior member of IEEE. He received his B. Tech. and M. Tech. degree in Electrical Engineering from Indian Institute of Technology, Kanpur, India, in 2008.
Amit Ranjan Trivedi is a senior member of IEEE. He received his B. Tech. and M. Tech. degree in Electrical Engineering from Indian Institute of Technology, Kanpur, India, in 2008. He received a Ph.D. degree in Electrical and Computer Engineering from Georgia Institute of Technology, Atlanta, GA, in 2015. He was with the IBM Semiconductor Research and Development Center (SRDC), Bangalore, India from 2008-2010. During his Ph.D., he was a summer intern at IBM T. J. Watson Research Institute (in 2012) and Intel’s Circuits Research Lab (in 2014). Since October 2015 he has been with the Department of Electrical and Computer Engineering at the University of Illinois at Chicago, IL, where he is currently associate professor. His current research interests include machine learning at the edge, edge robotics, and learning and inferring under uncertainties. Amit received IEEE Electron Device Society (EDS) fellowship in 2014 where he was one of the three recipients worldwide. Amit also received Georgia Tech Sigma Xi best Ph.D. dissertation award. In 2021, he was also awarded NSF CAREER Award. He has received IEEE CASS Seoul Chapter Best Paper Award for his AICAS’21 paper and UIC’s College of Engineering Faculty Research Award. He has authored or co-authored over 80 papers in refereed journals and conferences. He is also a theme lead on recently funded DARPA/SRC JUMP2.0 Center on CogniSense.

Ahmet Enis Cetin

Co-Principal Investigator
Ahmet Enis Cetin received his B.Sc. degree in Electrical Engineering from METU, Ankara, Turkey, in 1984 and Ph.D. degree from the University of Pennsylvania in 1987. He was an Assistant Professor at University of Toronto between 1987-1989.
Ahmet Enis Cetin received his B.Sc. degree in Electrical Engineering from METU, Ankara, Turkey, in 1984 and Ph.D. degree from the University of Pennsylvania in 1987. He was an Assistant Professor at University of Toronto between 1987-1989. He joined Bilkent University in 1989 and took an early retirement in 2017. He was a Visiting Professor at UC San Diego in 2016-2017. He joined University of Illinois Chicago in 2017 and he is now a professor of electrical and computer engineering. He is also a member of Discovery Partners Institute, Chicago, IL. Together with his Ph.D. student Erzin, he introduced the concept of adaptive prediction and split vector quantization for Line Spectral Frequency representations. This concept was used in ITU speech coding standards including G.729, G.723.1 and GSM EFR. He co-founded a successful startup wideangle OEM smart camera company in 2003: Oncam-Grandeye (ww.oncamgrandeye.com). His group at Bilkent University developed a surveillance camera-based wildfire detection system which is installed in more than 100 locations in Turkey, Cyprus, Singapore, South Korea and the US. He received a best paper award for this work in a meeting organized by UNESCO and Cyprus Presidency of the European Union. TIME Magazine recognized artificial intelligence (AI) based wildfire detection as one of the Best Inventions of 2023. He is the Editor-in-Chief, Signal, Image and Video Processing published by Springer-Nature. He is a Fellow of IEEE.

Sule Ozev

Co-Principal Investigator
Sule Ozev is currently a professor at Arizona State University, School of Electrical, Computer, and Energy Engineering.
Sule Ozev is currently a professor at Arizona State University, School of Electrical, Computer, and Energy Engineering. She received her B.S. from Bogazici University in Turkey, and her M.S. and Ph.D. from UC San Diego. She has worked as a faculty member since 2002 at Duke University and at Arizona State University. Her research interests include built-in self-test of RF, mixed-signal, MEMS, and other heterogenous systems, design automation through surrogate models, analysis and mitigation of process variations, and reliability enhancement for RF circuits. Dr. Ozev has published over 150 journal and conference papers and 4 US patents on these topics over the course of 27 years. Dr. Ozev also received 11 best paper and honorable mention awards for her work in various IEEE conferences.

Upcoming Events

Past Events

  • August 2024
    Northwestern University
    633 Clark St, Evanston, IL 60208
    hls4ml Summer School
  • JULY, 2024
    Tempe, AZ
    Special Session at the IEEE VLSI Test Symposium 2024 on Ensuring Reliability and Security of AI through hls4ml
  • JUNE, 2024
    Tempe, AZ
    Special Session at the IEEE VLSI Test Symposium 2024 on Ensuring Reliability and Security of AI through hls4ml
  • APRIL 22 - 24, 2024
    Tempe, AZ
    Special Session at the IEEE VLSI Test Symposium 2024 on Ensuring Reliability and Security of AI through hls4ml

Training Material

Tutorials

  • Deploying neural networks for in-situ inference on frame grabber FPGAs in high-speed imaging

    Guides the user through compilation, deployment, and benchmarking of quantized hls4ml neural network on high speed frame grabber device.

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  • Operating a commercial cartpole robot with neural network control using hls4ml

    This tutorial guides users through setting up a cartpole robot, training a neural network to achieve balance, and using hls4ml to convert the trained model into HLS for deployment on FPGA hardware for real-time control.

    Read more

Example Designs

No additional materials available for Example Designs.

Training Data

No additional materials available for Training Data.

Course Materials

No additional materials available for Course Materials.

Success Stories

Utilizing the Power of hls4ml for Transformative Applications in Embedded Systems and Material Science.


In-Situ High-Speed Computer Vision

Deploying neural networks for in-situ inference on frame grabber FPGAs in high-speed imaging

Medium article
Fusion Paper

In-Situ High-Speed Computer Vision

Image by: Daisuke Shiraki

Background

Many scientific domains utilize high-speed imaging to aid in experimentation and discovery. From analyzing fusion magneto hydrodynamics, to crystal structure detection in transmission electron microscopy, there is a need for in-situ fast inference in these experiments which operate in the kHz to MHz range.

Strategy

Typically, dedicated PCIe frame grabber devices are paired with high-speed cameras to handle such high throughput, and a protocol such as CoaXPress is used to transmit the raw camera data between the systems. Many frame grabbers implement this protocol as well as additional pixel preprocessing stages on an FPGA device, for which the manufacturer makes the reference design available. Moreover, open-source codesign workflows like hls4ml enable easy translation and deployment of neural networks to FPGA devices, and have demonstrated latencies on the order of nanoseconds to microseconds. We leverage these existing tools to construct a framework for quick neural network deployment to frame grabber FPGAs.

Results

We construct a framework for easy deployment of hls4ml neural networks to the frame grabbers for use in real-time control, data reduction, manufacturing, or other applications. The framework comes complete with two comprehensive tutorials, C/RTL testbenches, and pre-written HDL to enable easy inference latency benchmarking. We have successfully applied this framework to the field of fusion magnetohydrodynamics with more applications in progress.


Wildfire Project

Enabling Embedded Systems and IoT with hls4ml

Wildfire Project
Background

Wildfires pose an increasingly urgent global threat, as evidenced by recent devastating events in Maui, Hawaii, and across Alaska. To address this challenge, robust and reliable AI-based wildfire detection models are imperative. Our ongoing research has yielded significant advancements in video and image-based wildfire detection and ember detection AI models aimed at early prevention efforts.

Strategy

Recognizing the computational demands of these models, we propose leveraging Field Programmable Gate Arrays (FPGAs) due to their proven flexibility and parallel computation advantages. FPGAs serve as efficient hardware accelerators for deploying deep learning models, ensuring timely and accurate wildfire detection.

Results

To facilitate the integration of our AI detection models onto FPGAs, which have been trained using various frameworks including PyTorch and TensorFlow-Keras, we rely on the pivotal role of hls4ml in implementation. Our project focuses on demonstrating the effectiveness of AI models on FPGAs through the utilization of hls4ml, thereby enabling rapid and efficient wildfire detection and prevention strategies.


High Speed Camera+4D TEM

Enabling Material Science with hls4ml

High Speed Camera+4D TEM

Image by: Joshua Agar

Background

4D Scanning Transmission Electron Microscopy (4D-STEM) is a powerful technique for atomic resolution imaging. One common imaging mode captures 2D diffraction images at each pixel position in real space. The direct electron detectors used can reach 4K resolution at frame rates up to 5000 frames-per-second. This has led to orders of magnitude increase in the volume and velocity of the data collected, creating challenges in how to efficiently extract actionable information.

Strategy

We propose and demonstrate a machine learning hardware implementation for real-time crystal structure, rotation, and strain detection in 4D-STEM by leveraging a novel deep neural network (DNN) called a cycle-consistent spatial-transforming autoencoder (CC-ST-AE) capable of learning affine transformations on real and simulation data. We then use distillation to train a smaller, quantized, easily-deployable version of the model to enable real-time inference and high throughput.

Results

We use hls4ml to synthesize the distilled model and optimize the implementation to meet the required latency constraint of 100us. We then integrate the neural network in the readout path of the imaging system onboard a Euresys CoaXPress frame grabber to minimize IO-related overhead. This work provides a proof-of-concept for real-time crystal structure detection in 4D-STEM, significantly increasing the potential for fast materials characterization and discovery.