A package for machine learning inference in FPGAs. We create firmware implementations of machine learning algorithms using high level synthesis language (HLS). We translate traditional open-source machine learning package models into HLS that can be configured for your use-case!
The project is currently in development, so please let us know if you are interested, your experiences with the package, and if you would like new features to be added.
For the latest status including current and planned features, see the Status and Features page.