hls4ml.backends.vitis package

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Submodules

hls4ml.backends.vitis.vitis_backend module

class hls4ml.backends.vitis.vitis_backend.VitisBackend

Bases: VivadoBackend

build(model, reset=False, csim=True, synth=True, cosim=False, validation=False, export=False, vsynth=False)
create_initial_config(part='xcvu13p-flga2577-2-e', clock_period=5, clock_uncertainty='27%', io_type='io_parallel', namespace=None, write_weights_txt=True, write_tar=False, **_)

Create initial configuration of the Vitis backend.

Parameters:
  • part (str, optional) – The FPGA part to be used. Defaults to ‘xcvu13p-flga2577-2-e’.

  • clock_period (int, optional) – The clock period. Defaults to 5.

  • clock_uncertainty (str, optional) – The clock uncertainty. Defaults to 27%.

  • io_type (str, optional) – Type of implementation used. One of ‘io_parallel’ or ‘io_stream’. Defaults to ‘io_parallel’.

  • namespace (str, optional) – If defined, place all generated code within a namespace. Defaults to None.

  • write_weights_txt (bool, optional) – If True, writes weights to .txt files which speeds up compilation. Defaults to True.

  • write_tar (bool, optional) – If True, compresses the output directory into a .tar.gz file. Defaults to False.

Returns:

initial configuration.

Return type:

dict

Module contents